From: "Brett H. Williams" <brett_williams@...>
Date: 2003-04-04T08:17:11+09:00
Subject: Re: Any Hardware/EDA engineers out there?

On Apr  4, Phil Tomson wrote:
> So you essentially have a Verilog parser written in Ruby?
> 
> Is this something that you could release?
> 
> Phil

No, although that would be kind of neat and useful to share.  I wish that I
did.

It's a SWIG/Ruby wrapper around a C++ project.  One of the C++ project's
abilities is to parse verilog (via a C lex/yacc parser linked in).  Really it's
a logical connectivity database, with optional extensions for VLSI artwork.
Kind of a poor man's OpenAccess database (http://openeda.org).

Now there would be a useful addition for Ruby EDA.... Ruby bindings to
OpenAccess.  Not a trivial project though.

There are a few open source lex and yacc files for parsing verilog.  I wonder
if anyone has used racc or some other Ruby tool to make a Ruby verilog parser?
That would be a very handy addition to a rubyEDA website.

-- 
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Brett Williams                                 | (970) 288-0475        
Agilent Technologies                           | brett_williams@agilent.com
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