From: ptkwt@... (Phil Tomson)
Date: 2006-02-03T10:53:18+09:00
Subject: Re: neuroimage software - scientific computing and visualization

In article <43E2ABCD.4020903@siritech.com>,
Srinivas Jonnalagadda  <srinivas.j@siritech.com> wrote:
>Acceleration of algorithms by moving the number-crunching parts to FPGAs 
>has been well-utilized in the life sciences industry for a while now. 
>Due to non-disclosure agreements, I cannot provide the details, but my 
>company has been providing such solutions for the last couple of years.
>

Yes, this seems to be going on, though it's kind of been in the background.

>Normally, once the board design is finalized, a suitable C 
>implementation of the algorithm is used as the basis for a Verilog 
>implementation to be burned into the FPGA. Typically, these FPGAs are 
>mounted on PCI cards or USB devices.

Right, the idea here would be to either use the Raggedstone boards or one of 
the newer Xilinx boards which has USB.  The architectures needs to be modular 
to support different boards, though initially I'll concentrate on Xilinx FPGAs.

>
>A driver does the interface between the application in software and the 
>FPGA, handling interrupt events, data handover, etc.
>

Right, that's what I'm thinking, though I want to make all of that interface 
stuff as transparent as possible to the user by using Ruby to generate code, 
etc.

>I would be interested in your work, unless you are building a commercial 
>closed-source solution.

The idea is for this to be open source.  But if someone wants to pay me for 
support, such as developing the VHDL code, etc. that's cool.  I'm actually 
hoping that as this sort of thing gets popular that there could be some way for 
me to derrive some income from this.  I'm planning to spend the next three 
months or so on this putting in 20 to 40 hours/week, so I hope for some 
kind of payoff - it's kind of going to be my unpaid job unless I run out of 
money and have to look for more paying work ;-)

I think that FPGA acceleration is 
the way we're going to move to the next level of performance as general purpose 
CPUs are not increasing in performance as much as they used to.

Phil

>
>Best regards,
>
>JS
>
>ara.t.howard@noaa.gov wrote:
>> On Fri, 3 Feb 2006, Joel VanderWerf wrote:
>> 
>>> Phil Tomson wrote:
>>>> Here's an tantalizing idea that I'll throw out:  C is one thing and, 
>>>> yes, it's
>>>> fast.... but what if you could actually map some algorithm or math 
>>>> operation to
>>>> _hardware_ and thus get a large speed  advantage even over C?  I'm 
>>>> working on
>>>> something like this... details forthcoming.  The idea is very similar to
>>>> Ruby::Inline.  It will allow seamless communication between your Ruby 
>>>> program
>>>> and an FPGA board acting as hardware accelerator (these boards are 
>>>> available
>>>> for less than $200 now).
>>>
>>> That would be very cool. Eventually, we're going to be porting a
>>> wireless network stack to FPGA, and being able to still use Ruby would
>>> be very nice.
>>>
>>> What kind of code goes inside your "inline" blocks?
>> 
>> this sounds insanely cool.  can you ping me offline phil?
>> 
>> -a
>> 
>
>