From: ptkwt@... (Phil Tomson) Date: 2004-08-21T15:50:50+09:00 Subject: Re: ruby, actors, continuations, Kernel#callcc In article , Kristof Bastiaensen wrote: > >I think the nice thing about actor theory is that it allows lambda >calculus to be implemented using parallel objects. You could build a chip, >where each continuation-point can be programmed in the chip, and would act >on its own. This chip could the perform all the computations in parallel, >since each continuation point can act on it's own. This would be >radically different from the current cpu-design, where there is only a >single point of controlflow. A special sort of FPGA could be used for >this kind a chip, since they allow reprogramming on the fly. > >Because lambda calculus is very basic to programming, it could be possible >to transform a traditional program into a form that makes maximum use of >parallelism in such a chip, and therefor be very fast. Also all processes >that would fit into memory would run effectively parallel (not simulated >using task-switching), and wouldn't slow down any other process. It would >also support dynamic languages better, so that a ruby program wouldn't be >any slower that a C/C++ program. > >I don't know if the design of such a chip would be possible, but it would >be a radically different aproach to computing. > Sure, CPUs are not necessarily designed with this degree of parallelism in mind, however chip designs in general are usually modeled using HDLs which do allow for describing your design with all of the parallelism that is available in hardware. Of course, this is hard to simulate on our non-parallel computers, but usually the trick is to use something like continuations/coroutines (that's what is done in RHDL, for example). So I guess it seems like you're talking about a method for modelling the parallelism that is already inherant in hardware. BTW: Since you mentioned FPGAs (and yes, I think FPGAs represent the future of high performance computing since they allow you to map compuationally intensive algorithms into hardware for maximum performance [though, we still need better tools for mapping the algorithms]), you might be interested in the $99 Spartan III starter kit from Xilinx (http://www.xilinx.com) - it includes a board with a 200K gate FPGA and software for programming it. I just got mine today and am looking forward to playing with it (tinker toys for adults ;-) - it's amazing that you can get something like that now for $99, I recall working on an ASIC back in '89 that only had 2K gates and it wasn't reprogrammable. Back then a 200K ASIC would have been a very high-end design done by a large company with tens of thousands (if not hundreds of thousands) of dollars worth of workstations and design tools and FPGAs were only just becoming available with maybe 1K gates. Phil